Dielectric isolated high voltage semiconductor device
US5977606A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 1998 |
| Grant date | Nov 2, 1999 |
| Priority date | — |
| Expiry date | Feb 23, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A dielectric isolated high voltage semiconductor device having an arrangement for extending a depletion layer of a main junction beyond an insulating layer containing an island to a semiconductor supporter by applying the same reverse biasing voltage to the supporter and the islands. That is, in the structure, an electrode is provided at the back surface of the supporter and connected to a main electrode of the selected island. The above-mentioned main junction is the pn junction to which the reverse biasing voltage for securing the withstand voltage of the semiconductor device is applied. The device is structured, also, with high impurity concentration regions for preventing a depletion layer, formed during a reverse biasing of the main junction of a circuit element of an island, from extending into adjacently disposed islands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.