Apparatus and method for automatically accessing a dynamic RAM for system management interrupt handling
US5978903A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 1997 |
| Grant date | Nov 2, 1999 |
| Priority date | — |
| Expiry date | Aug 19, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0623
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A System Management Mode is transparent to normal system operations and dynamic RAM (DRAM) is available in the Upper Memory Block address range that is normally not accessible in many configurations. Therefore, the DRAM is advantageously used to attain System Management Mode read/write storage requirements. The System Management Mode time-multiplexes the Upper Memory Block memory-mapped address space with other non-DRAM resources in a timely manner by switching the SMM memory into the DRAM Upper Memory Block space in a "just in time" (JIT) basis. The JIT operation is achieved by latching the first memory address emitted from the CPU after SMM entry. The first memory address is designated as the top address of a memory block that extends downward into memory address space, defining an SMM memory range. All subsequent memory accesses that are addressed within the SMM memory range are directed to DRAM Upper Memory Block regardless of any other memory-mapped resources that normally reside within the same range of addresses as the SMM memory range. Upon the occurrence of an SMM resume instruction, the memory device mapping is automatically restored to the configuration existing prior to…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.