Computer unit responsive to difference between external clock period and circuit characteristic period
US5978929A · kind A · utility
13Cited by
10References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 20, 1997 |
| Grant date | Nov 2, 1999 |
| Priority date | — |
| Expiry date | Mar 20, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit such as a SRAM is connected to receive externally generated clock cycles. A delay period is generated within the circuit which is independent of the rate of the clock cycles. The rate of the clock cycles is compared to a delay period and the operation of the integrated circuit is varied depending on the comparison. The integrated circuit adapts itself to changes in operating temperature, applied voltages, process variations which result in structural or materials differences between devices, and changes in the rate of externally generated clock cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.