Patent · US Expired

Programmable logic device architectures

US5982195A · kind A · utility

98Cited by
40References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 11, 1997
Grant dateNov 9, 1999
Priority date
Expiry dateJun 11, 2017

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH05K1/181
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A programmable logic device has regions of programmable logic disposed on the device in a two-dimensional array of intersecting rows and columns of such regions. Horizontal interconnection conductors are associated with each row, and vertical interconnection conductors are associated with each column. Local conductors are interspersed between adjacent pairs of regions in each row for supplying signals to the regions on both sides of the local conductors. Subregions of programmable logic in each region generally have a local output and a global output. The global output is only usable to output to the relatively long-distance horizontal and vertical conductors. The local output is additionally usable as a local feedback and as a local connection to an adjacent region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.