Method of simulating a profile of sputter deposition which covers a contact hole formed on a semiconductor wafer
US5983011A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 2, 1997 |
| Grant date | Nov 9, 1999 |
| Priority date | — |
| Expiry date | Sep 2, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/23
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In order to simulate, using a computer, a profile of sputter deposition on a contact hole formed on a semiconductor wafer, a plurality of trajectories of particles emitted from a sputter target are calculated. One of the trajectories is directed to a first coordinate point which is included in the profile of sputter deposition and with which an amount of sputter deposition is calculated. Thereafter, a plurality of shadow judgment planes are successively defined with respect to all coordinate points, after which a check is made to determine if the above mentioned one of the plurality of trajectories crosses each of said plurality of shadow judgment planes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.