Method of fabricating semiconductor device
US5985711A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 17, 1997 |
| Grant date | Nov 16, 1999 |
| Priority date | — |
| Expiry date | Apr 17, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes the steps of forming a plurality of gate electrodes on a first region and a second region of a substrate, the plurality of gate electrodes having cap insulating layers thereon; forming source and drain regions in the first region and the second region, the source and drain regions of the second region having an LDD structure; forming an insulating layer on the substrate including the plurality of gate electrodes; forming contact holes in the insulating layer to simultaneously expose the source and the drain regions of the first region and the cap insulating layer on the gate electrodes in the second region; selectively removing the cap insulating layer on the gate electrodes in the second region; and forming a metal line in the contact holes and on the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.