High density gate array cell architecture with metallization routing tracks having a variable pitch
US5990502A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 29, 1995 |
| Grant date | Nov 23, 1999 |
| Priority date | — |
| Expiry date | Dec 29, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A gate array cell architecture is provided with routing tracks at variable track pitches, thereby increasing the density of the architecture. Orientation of the devices in the gate cells perpendicularly to the routing tracks in the second metallization layer provides an increased porosity in this layer. The orientation allows an N channel device to be made smaller than a P channel device within a gate cell, to provide balanced devices. The perpendicular orientation also provides more contact points for source or drain. When the mulitple contacts are used to connect the device to a power source, the multiple contacts reduce the effective resistance and increase the reliability of the devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.