Chip scale ball grid array for integrated circuit package
US5990545A · kind A · utility
124Cited by
18References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 2, 1996 |
| Grant date | Nov 23, 1999 |
| Priority date | — |
| Expiry date | Dec 2, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip scale ball grid array for integrated circuit packaging having a nonpolymer layer or support structure positioned between a semiconductor die and a substrate. The nonpolymer support structure acts to increase circuit reliability by reducing thermal stress effects and/or by reducing or eliminating formation of voids in an integrated circuit package. A nonpolymer support structure may be a material, such as copper foil, having sufficient rigidity to allow processing of chip scale package in strip format.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.