Parallel decompressor and related methods and apparatuses
US5991909A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 1996 |
| Grant date | Nov 23, 1999 |
| Priority date | — |
| Expiry date | Oct 15, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318385
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A parallel decompressor capable of concurrently generating in parallel multiple portions of a deterministic partially specified data vector is disclosed. The parallel decompressor is also capable of functioning as a PRPG for generating pseudo-random data vectors. The parallel decompressor is suitable for incorporation into BIST circuitry of ICs. For BIST circuitry with multiple scan chains, the parallel decompressor may be incorporated without requiring additional flip-flops (beyond those presence in the LFSR and scan chains). In one embodiment, an incorporating IC includes boundary scan design compatible with the IEEE 1194.1 standard. Multiple ones of such ICs may be incorporated in a circuit board. Software tools for generating ICs with boundary scan having BIST circuitry incorporated with the parallel decompressor, and for computing the test data seeds for the deterministic partially specified test vectors are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.