Jerzy Tyszer
83Patents
28h-index
26Co-inventors
88Inventor score
Filing activity: Jun 11, 1993 → Nov 17, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5991898A | Arithmetic built-in self test of multiple scan-based integrated circuits | Physics | 174 | Expired |
| US5991909A | Parallel decompressor and related methods and apparatuses | Physics | 149 | Expired |
| US6557129B1 | Method and apparatus for selectively compacting test responses | Physics | 136 | Expired |
| US6327687A | Test pattern compression for an integrated circuit test environment | Physics | 128 | Expired |
| US6684358B1 | Decompressor/PRPG for applying pseudo-random and deterministic test patterns | Physics | 113 | Expired |
| US6728901B1 | Arithmetic built-in self-test of multiple scan-based integrated circuits | Physics | 89 | Expired |
| US6829740B2 | Method and apparatus for selectively compacting test responses | Physics | 86 | Expired |
| US6543020B2 | Test pattern compression for an integrated circuit test environment | Physics | 86 | Expired |
| US7093175B2 | Decompressor/PRPG for applying pseudo-random and deterministic test patterns | Physics | 62 | Expired |
| US6874109B1 | Phase shifter with reduced linear dependency | Physics | 61 | Expired |
| US6353842B1 | Method for synthesizing linear finite state machines | Physics | 61 | Expired |
| US7111209B2 | Test pattern compression for an integrated circuit test environment | Physics | 59 | Expired |
| US7370254B2 | Compressing test responses using a compactor | Physics | 50 | Expired |
| US7818644B2 | Multi-stage test response compactors | Physics | 50 | Active |
| US6708192B2 | Method for synthesizing linear finite state machines | Physics | 48 | Expired |
| US6539409B2 | Method for synthesizing linear finite state machines | Physics | 46 | Expired |
| US7913137B2 | On-chip comparison and response collection tools and techniques | Physics | 45 | Active |
| US7797603B2 | Low power decompression of test cubes | Physics | 42 | Active |
| US7500163B2 | Method and apparatus for selectively compacting test responses | Physics | 41 | Expired |
| US7260591B2 | Method for synthesizing linear finite state machines | Physics | 33 | Expired |
| US7263641B2 | Phase shifter with reduced linear dependency | Physics | 32 | Expired |
| US7647540B2 | Decompressors for low power decompression of test patterns | Physics | 31 | Active |
| US7493540B1 | Continuous application and decompression of test patterns to a circuit-under-test | Physics | 31 | Expired |
| US7506232B2 | Decompressor/PRPG for applying pseudo-random and deterministic test patterns | Physics | 31 | Active |
| US7302624B2 | Adaptive fault diagnosis of compressed test responses | Physics | 30 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.