Patent · US Expired

Method for making electrical interconnections between layers of an IC package

US5992012A · kind A · utility

5Cited by
5References
19Claims
0Family size

Assignee

Inventor

Key dates

Filing dateNov 17, 1997
Grant dateNov 30, 1999
Priority date
Expiry dateNov 17, 2017

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T29/49165
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

In the manufacture of Printed Circuit (PC) boards, conductors are placed in a base layer of glass cloth. The conductors penetrate the thickness of the cloth and can be arranged to form a matrix or grid. The arrangement of cloth and conductors is then cured with resin with the wire lengths disposed within the cured board core. The wire lengths can be made flush with the board core surfaces and become the electrical conductors between circuitry on such surfaces. In one embodiment, the wire is removed leaving a finished hole ready for standard through-hole plating. These finished circuit boards can be stacked and laminated forming through, blind, or buried vias. One or more finished circuit boards with imbedded vias can be used as circuitry redistribution layers to avoid dense circuit patterns in applications such as in flip-chip mounting of integrated circuit chips. In another embodiment, the conductors are imbedded in the glass cloth with sufficient density to form a composite thick conductor. Other layers can then be laminated or built up on this composite and multiple vias can then be formed to the thick conductor using conventional techniques.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.