Apparatus, and corresponding method, for stress testing wire bond-type semi-conductor chips
US5994910A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1998 |
| Grant date | Nov 30, 1999 |
| Priority date | — |
| Expiry date | Sep 24, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2862
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus, and a corresponding method, for stress-testing wire bond-type semiconductor chips is disclosed. The apparatus includes a clamp housing, with a spring-loaded screw extending through the top end of the housing. Contained within the clamp housing is a substantially rigid, electrically insulating base plate positioned at a lower end of the clamp housing. The upper surface of the base plate includes a depression which contains an insert fabricated either from an elastomeric material or a semiconductor material, such as silicon. A flexible, electrically insulating layer made from, for example, polyimide, overlies the base plate and insert. Significantly, the upper surface of the flexible, electrically insulating layer includes a plurality of dendritic contacts. It is through these dendritic contacts that electrical contact is made to the contact pads of a wire bond-type semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.