Data processing system and method of permutation with replication within a vector register file
US5996057A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Apr 17, 1998 |
| Grant date | Nov 30, 1999 |
| Priority date | — |
| Expiry date | Apr 17, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8084
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The data processing system of the present invention loads three input operands, including two input vectors and a control vector, into vector registers and performs a permutation of the two input vectors as specified by the control vector, and further stores the result of the operation as the output operand in an output register. The control vector consists of sixteen indices, each uniquely identifying a single byte of input data in either of the input registers, and can be specified in the operational code or be the result of a computation previously performed within the vector registers. The specification of the control vector allows a vector-matrix operation to be performed on the input vectors by rearranging or replicating the input operand bytes in the bytes of the output register as a function of the control vector. This system provides a highly efficient register loading mechanism for data vectors misaligned in memory, and allows the computation of a serially dependent chain of binary functions within the vector registers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.