Inventor · Cary, NC, US

Brett Olsson

70Patents
20h-index
41Co-inventors
88Inventor score

Filing activity: Sep 28, 1994 → Sep 21, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US5513366A Method and system for dynamically reconfiguring a register file in a vector processor Physics 203 Expired
US5887183A Method and system in a data processing system for loading and storing vectors in a plurality of modes Physics 184 Expired
US6202130A Data processing system for processing vector data and method therefor Physics 111 Expired
US5996057A Data processing system and method of permutation with replication within a vector register file Physics 99 Expired
US6334176A Method and apparatus for generating an alignment control vector Physics 83 Expired
US5758176A Method and system for providing a single-instruction, multiple-data execution unit for performing single-instruction, multiple-data operations within a superscalar data processing system Physics 82 Expired
US5680338A Method and system for vector processing utilizing selected vector elements Physics 65 Expired
US7877582B2 Multi-addressable register file Physics 61 Active
US5825677A Numerically intensive computer accelerator Physics 55 Expired
US9727337B2 Fine-grained instruction enablement at sub-function granularity based on an indicated subrange of registers Physics 43 Active
US6282628A Method and system for a result code for a single-instruction multiple-data predicate compare operation Physics 42 Expired
US5890222A Method and system for addressing registers in a data processing unit in an indirect addressing mode Physics 40 Expired
US7793081B2 Implementing instruction set architectures with non-contiguous register file specifiers Physics 32 Active
US7421566B2 Implementing instruction set architectures with non-contiguous register file specifiers Physics 29 Active
US8458442B2 Method and structure of using SIMD vector architectures to implement matrix multiplication Physics 24 Active
US8918623B2 Implementing instruction set architectures with non-contiguous register file specifiers Physics 22 Active
US6343337B1 Wide shifting in the vector permute unit Physics 22 Expired
US6202141A Method and apparatus for performing vector operation using separate multiplication on odd and even data elements of source vectors Physics 21 Expired
US8166281B2 Implementing instruction set architectures with non-contiguous register file specifiers Physics 21 Active
US6327651A Wide shifting in the vector permute unit Physics 20 Expired
US6298365A Method and system for bounds comparator Physics 13 Expired
US7849294B2 Sharing data in internal and memory representations with dynamic data-driven conversion Physics 7 Active
US9395981B2 Multi-addressable register files and format conversions associated therewith Physics 7 Active
US8893095B2 Methods for generating code for an architecture encoding an extended register specification Physics 6 Active
US5832533A Method and system for addressing registers in a data processing unit in an indexed addressing mode Physics 5 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.