Concurrent execution of machine context synchronization operations and non-interruptible instructions
US5996085A · kind A · utility
24Cited by
3References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 15, 1997 |
| Grant date | Nov 30, 1999 |
| Priority date | — |
| Expiry date | Jul 15, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Within a superscalar processor implementing parallel processing of instructions, machine context synchronization operations, which may alter the context or state of the processor, are allowed to be executed in parallel with non-interruptible instructions under certain conditions. Such a condition includes the absence of a side effect of the change of context resulting from the machine context synchronization operations on the non-interruptible instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.