Fabrication process using a multi-layer antireflective layer
US5998100A · kind A · utility
43Cited by
14References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 5, 1997 |
| Grant date | Dec 7, 1999 |
| Priority date | — |
| Expiry date | Sep 5, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/95
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabrication process includes a step of providing a substrate to be fabricated. A multi-layer antireflective layer is then formed on the substrate. A patterned resist having a thickness less than 850 nanometers is formed on the multi-layer antireflective layer and the substrate is fabricated using the patterned resist as a mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.