Method of fabricating an oxygen-stable layer/diffusion barrier/poly bottom electrode structure for high-K DRAMs using disposable-oxide processing

US5998225A · kind A · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Darius Crenshaw · Allen, US
• Scott R. Summerfelt · Dallas, US

Key dates

• Filing date: Dec 15, 1998
• Grant date: Dec 7, 1999
• Expiry date: Dec 15, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/684

Abstract

A capacitor structure and method. The capacitor (12) comprises a HDC dielectric (40) and upper (44) and lower electrodes. The lower electrode comprises polysilicon(31-32), a diffusion barrier (34) on the polysilicon and an oxygen stable material (36) on the diffusion barrier (34). The diffusion barrier (34) is deposited followed by the deposition of a temporary dielectric layer (50). The temporary dielectric layer (50) is then patterned and etched to expose the area where the storage node is desired. Next, the oxygen stable material (36) is deposited. The oxygen stable material (36) is then either etched back or CMP processed using the temporary dielectric layer (50) as an endpoint. The temporary dielectric layer (50) is then removed along with the exposed portions of diffusion barrier (34). The HDC dielectric (40) is then formed adjacent the oxygen stable material (36).