Patent · US Expired

Method of forming a semiconductor structure having laterally merged body layer

US5998266A · kind A · utility

11Cited by
9References
11Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 19, 1996
Grant dateDec 7, 1999
Priority date
Expiry dateDec 19, 2016

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/127

Abstract

A trenched gate MOSFET (metal oxide semiconductor field effect transistor) structure is fabricated via a novel process which includes the step of using a common mask serving the dual role as a mask for the body layer formation and as a mask for trench etching. The common mask defines an patterned oxide layer which includes a plurality of openings at a predetermined distance away from the scribe line of the MOSFET structure. During fabrication, material of the body layer is implanted through the openings of the patterned oxide layer. Thereafter, the implanted material is side-diffused and merged together under a drive-in cycle as one continuous body layer. Using the same patterned oxide layer as a shield, trenches are anisotropically etched in the substrate. The MOSFET structure as formed requires no separate mask for delineating the active body region away from the scribe line, resulting reduction of fabrication steps. The consequential benefits are lower manufacturing costs and higher production yields.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.