Method of fabricating shallow trench isolation structures using a oxidized polysilicon trench mask
US5998278A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 7, 1998 |
| Grant date | Dec 7, 1999 |
| Priority date | — |
| Expiry date | Apr 7, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating shallow trench isolation structures. A substrate over which a polysilicon layer and a masking layer are formed is provided. An opening is formed within the polysilicon layer and the masking layer. A trench is then formed within the substrate. An oxide layer is formed within the trench, and the surface of the oxide layer has a same level as the surface of the masking layer. The masking layer is removed and a thermal process is performed to transform the polysilicon layer to a silicon oxide layer. The silicon oxide layer is removed by an wet etching process and a shallow trench isolation structure is accomplished.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.