Semiconductor device having lead on chip structure
US6002167A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 1996 |
| Grant date | Dec 14, 1999 |
| Priority date | — |
| Expiry date | Sep 20, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a semi-conductor chip 1 having bonding pads 2 thereon, conductive leads 4, each of which comprises an inner lead 41 and an outer lead 42, insulating adhesive tapes 3 by which each of the inner leads 41 of the leads 4 is stuck to the surface 1a of the semiconductor chip 1, bonding wires 6 by which each of the leads 4 is electrically connected to each corresponding bonding pad 2. The semiconductor chip 1, bonding pad 2, adhesive tapes 3, inner leads 41, and bonding wires 6 are molded by a molding resin 5. The boundary of the inner lead 41 and the cuter lead 42 of the lead 4 is bent in S-shape so that there is a step between inner lead 41 and the upper side portion 42a of the outer lead 42 in a certain depth. Then the outer lead 42 protrude out of the molding resin and extend in J-shape. The surface 4a of the upper side portion 42a of the outer lead 42 is higher than the top of the looped bonding wire 6.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.