Secure memory management unit which utilizes a system processor to perform page swapping
US6003117A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1997 |
| Grant date | Dec 14, 1999 |
| Priority date | — |
| Expiry date | Oct 8, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit accesses encrypted data stored in an external memory, the integrated circuit includes a main memory for storing decrypted data. A processor within the integrated circuit utilizes the decrypted data in the main memory. A soft secure memory management unit (SMMU), within the integrated circuit, monitors data accesses by the processor. The soft SMMU signals the processor when the processor attempts to access first data which is not within the decrypted data in the main memory but is within the encrypted data stored in the external memory. When the soft SMMU signals the processor, the processor oversees transfer of the first data from the external memory and oversees decryption of the first data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.