Patent · US Expired

Field programmable gate array with dedicated computer bus interface and method for configuring both

US6011407A · kind A · utility

273Cited by
5References
13Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJun 13, 1997
Grant dateJan 4, 2000
Priority date
Expiry dateJun 13, 2017

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/17744
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A field programmable gate array is provided which has a programmable portion and a dedicated controller-interface circuit. The programmable portion includes conventional input/output (I/O) blocks and configurable logic blocks (CLBs). The controller-interface circuit allows the FPGA to be operably coupled to an external computer bus, such as a PCI bus. The programmable portion and the controller-interface circuit are separately programmable. As a result, after the controller-interface circuit is initialized, the programmable portion can be cleared and reconfigured without having to re-initialize the controller-interface circuit. The programmable portion is programmed in accordance with an implied addressing scheme in response to a configuration bit stream.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.