Apparatus and method for improved floating point exchange
US6014736A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1998 |
| Grant date | Jan 11, 2000 |
| Priority date | — |
| Expiry date | Mar 26, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3858
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor is provided for executing a floating point exchange micro instruction sequence to swap the contents a first location and a second location. The microprocessor includes register/control logic that receives a floating point micro instruction, determines that the contents of the first location depend upon resolution of a preceding floating point micro instruction, and provides a signal indicating the dependency. The microprocessor also has interlock logic that, in the event of a dependency forwards a new target location to the preceding floating point micro instruction. The microprocessor also includes target location modification logic that receives the new target location and for provides the new target location to the preceding floating point micro instruction. Modification of the target location allows the floating point exchange micro instruction sequence to execute without resolution delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.