IP-First, LLC
129Patents
12Active
129Granted
41Portfolio score
Filing activity: Jun 9, 1997 → Jun 5, 2007 · 12 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6832296B2 | Microprocessor with repeat prefetch instruction | Physics | 109 | Expired |
| US6571331B2 | Static branch prediction mechanism for conditional branch instructions | Physics | 95 | Expired |
| US7546446B2 | Selective interrupt suppression | Physics | 65 | Expired |
| US6647489B1 | Compare branch instruction pairing within a single integer pipeline | Physics | 49 | Expired |
| US6338136B1 | Pairing of load-ALU-store with conditional branch | Physics | 48 | Expired |
| US6681311B2 | Translation lookaside buffer that caches memory type information | Physics | 43 | Expired |
| US7117347B2 | Processor including fallback branch prediction mechanism for far jump and far call instructions | Physics | 39 | Expired |
| US6314514A | Method and apparatus for correcting an internal call/return stack in a microprocessor that speculatively executes call and return instructions | Physics | 39 | Expired |
| US6108773A | Apparatus and method for branch target address calculation during instruction decode | Physics | 35 | Expired |
| US6609194B1 | Apparatus for performing branch target address calculation based on branch type | Physics | 35 | Expired |
| US6550004B1 | Hybrid branch predictor with improved selector table update mechanism | Physics | 34 | Expired |
| US7532722B2 | Apparatus and method for performing transparent block cipher cryptographic functions | Electricity | 31 | Expired |
| US6370661B1 | Apparatus for testing memory in a microprocessor | Physics | 31 | Expired |
| US6886093B2 | Speculative hybrid branch direction predictor | Physics | 30 | Expired |
| US6549985B1 | Method and apparatus for resolving additional load misses and page table walks under orthogonal stalls in a single pipeline processor | Physics | 29 | Expired |
| US7181596B2 | Apparatus and method for extending a microprocessor instruction set | Physics | 28 | Expired |
| US6061781A | Concurrent execution of divide microinstructions in floating point unit and overflow detection microinstructions in integer unit for integer divide | Physics | 27 | Expired |
| US7321910B2 | Microprocessor apparatus and method for performing block cipher cryptographic functions | Electricity | 24 | Expired |
| US7203824B2 | Apparatus and method for handling BTAC branches that wrap across instruction cache lines | Physics | 23 | Expired |
| US6895498B2 | Apparatus and method for target address replacement in speculative branch target address cache | Physics | 23 | Expired |
| US7111125B2 | Apparatus and method for renaming a data block within a cache | Physics | 22 | Expired |
| US6810466B2 | Microprocessor and method for performing selective prefetch based on bus activity level | Physics | 22 | Expired |
| US6862704B1 | Apparatus and method for testing memory in a microprocessor | Physics | 22 | Expired |
| US6823444B1 | Apparatus and method for selectively accessing disparate instruction buffer stages based on branch target address cache hit and instruction stage wrap | Physics | 21 | Expired |
| US6871206B2 | Continuous multi-buffering random number generator | Physics | 20 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.