Integrated circuit with tungsten plug containing amorphization layer
US6016009A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 1998 |
| Grant date | Jan 18, 2000 |
| Priority date | — |
| Expiry date | Apr 27, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process of forming a tungsten contact plug, on an integrated circuit (IC), that is substantially free of seam formation is described. The process includes forming a dielectric layer on a surface of a substrate, forming a via in the dielectric layer, blanket depositing a first bulk layer of tungsten on the dielectric layer and partially filling the via, blanket depositing an amorphous or a microcrystalline layer of tungsten over the first bulk layer of tungsten such that growth of tungsten grains inside the via is effectively inhibited, and blanket depositing a second bulk layer of tungsten on the amorphous or microcrystalline layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.