Structure of a memory cell

US6020606A · kind A · utility

Assignee

• United Silicon Incorporated · TW

Inventor

• Kuan-Yang Liao · Taipei, TW

Key dates

• Filing date: Jun 9, 1998
• Grant date: Feb 1, 2000
• Expiry date: Jun 9, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/681

Abstract

A structure of a memory cell in a memory device is taking an interface between a silicon nitride layer and a oxide layer. The memory cell includes: a polysilicon layer on a substrate, a silicon nitride layer on the polysilicon layer, an oxide layer on the silicon nitride layer, and a conductor layer on the oxide layer. The order of forming the silicon nitride layer and the oxide layer can be reversed either for another alternative structure of the memory cell.