Semiconductor wafer having a bottom surface protective coating
US6023094A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 1998 |
| Grant date | Feb 8, 2000 |
| Priority date | — |
| Expiry date | Jan 14, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01068
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a packaged integrated circuit device. The device includes a die having a plurality of electrical contacts on a first surface of the die and a protective film adhered directly to a back surface of the die, the protective film being thick enough to allow laser marking of the protective film without the laser penetrating to the die. In one preferred embodiment, the protective film of the device is a thick film formed by screen printing. In a preferred embodiment, the protective film has a thickness of between about 1.5 and 5 mils. Also, disclosed is a method of fabricating a semiconductor wafer having a wafer substrate with a top surface and a bottom surface and a plurality of dies. In this embodiment, the method includes providing a plurality of dies on the top surface of the wafer substrate, applying a thick film over the bottom surface of the wafer substrate, adhering the thick film to a mounting tape that is not ultraviolet curable, and dicing the wafer to separate the dies. The thick film reduces chipping along edges of the separated dies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.