Overlay alignment measurement of wafers
US6023338A · kind A · utility
Inventor
Key dates
| Filing date | Jul 12, 1996 |
| Grant date | Feb 8, 2000 |
| Priority date | — |
| Expiry date | Jul 12, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention is a new target, and associated apparatus and methods, for determining offset between adjacent layers of a semiconductor device. The target disclosed here includes a first periodic structure to be placed on a first layer of the device and a second periodic structure, that complements the first periodic structure, placed on a second layer of the device at a location that is adjacent the first periodic structure when the second layer is placed on the first layer. Any offset that may occur is detected by the present invention either optically, micro-mechanically or with electron beams using any of various methods and system embodiments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.