Methods of forming field effect transistors having graded drain region doping profiles therein
US6025237A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 8, 1997 |
| Grant date | Feb 15, 2000 |
| Priority date | — |
| Expiry date | Oct 8, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/657
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming field effect transistors include the steps of implanting first conductivity type dopants at a first dose level into a first portion of a relatively lightly doped drift region of first conductivity type semiconductor and then oxidizing the first portion of the semiconductor drift region to form a relatively thick field oxide isolation region and simultaneously form a drain region extension of first conductivity type semiconductor (e.g., N.sup.0) underneath the field oxide isolation region by driving the dopants implanted at the first dose level into the drift region. A body region of second conductivity type semiconductor (e.g., P-type) is then formed in a second portion of the semiconductor drift region. A gate electrode is then formed on the drift region to extend opposite the body region and the field oxide isolation region. Source and drain regions of first conductivity type semiconductor (e.g., N+) are then formed in the body region and in a third portion of the drift region spaced from the second portion, respectively, by implanting first conductivity type dopants at a second dose level using the gate electrode and field oxide isolation region as an implant …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.