Patent · US Expired

Method and system for establishing a common reference point on a semiconductor wafer inspected by two or more scanning mechanisms

US6028664A · kind A · utility

27Cited by
7References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 14, 1997
Grant dateFeb 22, 2000
Priority date
Expiry dateApr 14, 2017

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01N21/9501
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A method and system for establishing a common reference point on a semiconductor wafer inspected by two or more scanning mechanisms. The semiconductor wafer includes a plurality of dies of identical size, each die being generally rectangularly shaped and having four corners. Adjacent dies are separated by a die street, the sum of the width of a die and the width of a die street equaling a die period. The method includes scanning the semiconductor wafer with a first scanning mechanism to establish a first coordinate system for the wafer. The first scanning mechanism determines a point on the wafer to be the center of the wafer which is assigned a first coordinate value relative to the first coordinate system. The location of the common reference point in the first coordinate system is calculated as the die corner which is within half the die period from the first coordinate value, the common reference point being assigned a second coordinate value in the first coordinate system. The semiconductor wafer is then scanned by a second scanning mechanism which establishes a second coordinate system for the wafer. The second coordinate value is located in the second coordinate system. The …

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.