Patent · US Expired

Integrated memory

US6028815A · kind A · utility

1Cited by
4References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 1, 1999
Grant dateFeb 22, 2000
Priority date
Expiry dateMar 1, 2019

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C8/14
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The integrated memory has byte selection lines for selecting all the bit lines of a respective byte, as well as masking signals that are allocated to the respective byte of at least one word. In addition, the memory has a column decoder with outputs which are connected to the word selection lines, each of which, when addressed, causes all the byte selection lines for one of the words to be simultaneously selected if none of the masking signals are active. The masking signals, when activated, prevent the addressed word selection line from selecting the byte selection lines, allocated to a corresponding byte, for a corresponding word.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.