Electroless gold plating method for forming inductor structures
US6030877A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 6, 1997 |
| Grant date | Feb 29, 2000 |
| Priority date | — |
| Expiry date | Oct 6, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/288
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method of manufacturing an inductor element 46 using an electroless Au plating solution. The invention has three embodiments for forming the inductor. In the first embodiment, a first insulating layer 30 is formed over a semiconductor structure 10 20. An adhesion layer 34 composed of polysilicon is formed over the first insulating layer 30. A first barrier layer 36 comprised of Ni is selectively formed using an Ni electroless plating process over the adhesion layer 34. In an important step, a gold layer 40 is electroless plated over the first barrier layer 36 using an Au electroless plating process. A second barrier layer 44 is formed over the gold layer 40 using an electroless Ni deposition technique. A planarization layer is formed over the second barrier layer. A novel core metal layer composed of a Fe--Co alloy is electroless plated over the planarization layer. The second and third embodiments vary in the process of defining the gold electroless inductor by forming the inductor in a trench. The gold electroless inductor 46 can withstand high current densities without suffering from electromigration effects and is highly corrosion resistant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.