High density flat cell mask ROM

US6034403A · kind A · utility

Assignee

• Acer Semiconductor Manufacturing Corp. · TW

Inventor

• Shye-Lin Wu · 東區, TW

Key dates

• Filing date: Jun 25, 1998
• Grant date: Mar 7, 2000
• Expiry date: Jun 25, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B20/383

Abstract

A high-density flat cell mask ROM is disclosed. The mask ROM comprises: a semiconductor substrate having a plurality of trenches and each of the trenches is separated to keep a space with each other. A plurality of oxynitride layers is formed on all sidewall and bottom surfaces of those trenches. A plurality of n+-doped polysilicon layers is formed on the oxynitride layers. A n+ doped silicon layer serves as buried bit line formed in the semiconductor substrate and surrounding the trenches. Each of the doped silicon layers is spaced from the n+-doped polysilicon layers by the oxynitride layer. A plurality of thick oxide layers is formed on the n+ polysilicon layers. A plurality of thin oxide layers are formed on the semiconductor substrate and between those thick oxide layer, and each of thin oxide layers is contiguous with the thick oxide layers. A coding region is formed in the semiconductor substrate and abutting one of those thin oxide layers, and another n+-doped polysilicon layer formed on upper surfaces of those thick oxide layers, and those thin oxide layers.