Method for constructing fault classification tables of analog circuits
US6035114A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 5, 1997 |
| Grant date | Mar 7, 2000 |
| Priority date | — |
| Expiry date | Aug 5, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/316
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention discloses a method for constructing the fault classification tables of analog circuits, and the fault classification tables can be further applied to construct analog CAT tools. The constructing method uses the fault models but the normal models inserting in parts of the analog circuit components, and then utilizes a circuit simulator to obtain waveform from the defect analog circuit. Exclusive and non-exclusive classification schemes are applied to establish the failure modes of the defect analog circuit when the waveform is recorded as a fault dictionary. It is unnecessary to construct a real analog circuit as the conventional does.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.