Computer with optimizing hardware for conditional hedge fetching into cache storage
US6035392A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 1998 |
| Grant date | Mar 7, 2000 |
| Priority date | — |
| Expiry date | Feb 20, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3804
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer for executing programs and having a structure for fetching instructions and/or operands along a path which may not be taken by a process being executed by a computer processor having a hierarchical memory structure with data being loaded into cache lines of a cache in the structure, and having block line fetch signal selection logic and computational logic with hedge selection logic for generating line fetch block signals for control of hedging by fetching instructions and/or operands along a path which may not be taken by a process being executed and making selected hedge fetches sensitive to whether the data is in the cache so as to gain the best performance advantage with a selected hedge fetch signal which accompanies each fetch request to the cache to identify whether a line should be loaded if it misses the cache to indicate a selected hedge fetch when this signal is ON, and rejecting a fetch request in the event the selected hedge fetch signal is turned ON if the data is not in the cache, the cache will reject the fetch, and thereafter repeating the fetch request after a fetch request has been rejected when the selected hedge fetch signal was turned ON the data wa…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.