Charles F. Webb
101Patents
19h-index
100Co-inventors
89Inventor score
Filing activity: Apr 1, 1977 → Jun 28, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5461721A | System for transferring data between I/O devices and main or expanded storage under dynamic control of independent indirect address words (IDAWs) | Physics | 99 | Expired |
| US4167799A | Carpet cleaning machine | Human Necessities | 76 | Expired |
| US5504859A | Data processor with enhanced error recovery | Physics | 64 | Expired |
| US6119219A | System serialization with early release of individual processor | Physics | 60 | Expired |
| US6079013A | Multiprocessor serialization with early release of processors | Physics | 53 | Expired |
| US5495590A | Checkpoint synchronization with instruction overlap enabled | Physics | 47 | Expired |
| US5345567A | System and method for modifying program status word system mask, system access key, and address space code with overlap enabled | Physics | 41 | Expired |
| US5276882A | Subroutine return through branch history table | Physics | 38 | Expired |
| US8850166B2 | Load pair disjoint facility and instruction therefore | Physics | 38 | Active |
| US8103851B2 | Dynamic address translation with translation table entry format control for indentifying format of the translation table entry | Physics | 28 | Active |
| US5687106A | Implementation of binary floating point using hexadecimal floating point unit | Physics | 27 | Expired |
| US5694617A | System for prioritizing quiesce requests and recovering from a quiescent state in a multiprocessing system with a milli-mode operation | Physics | 27 | Expired |
| US5257354A | System for monitoring and undoing execution of instructions beyond a serialization point upon occurrence of in-correct results | Physics | 26 | Expired |
| US5802359A | Mapping processor state into a millicode addressable processor state register array | Physics | 23 | Expired |
| US8380907B2 | Method, system and computer program product for providing filtering of GUEST2 quiesce requests | Physics | 23 | Active |
| US8117417B2 | Dynamic address translation with change record override | Physics | 21 | Active |
| US5371867A | Method of using small addresses to access any guest zone in a large memory | Physics | 21 | Expired |
| US5790844A | Millicode load and test access instruction that blocks interrupts in response to access exceptions | Physics | 20 | Expired |
| US6058470A | Specialized millicode instruction for translate and test | Physics | 20 | Expired |
| US5748951A | Specialized millicode instructions which reduce cycle time and number of instructions necessary to perform complex operations | Physics | 17 | Expired |
| US6865645B1 | Program store compare handling between instruction and operand caches | Physics | 16 | Expired |
| US8037278B2 | Dynamic address translation with format control | Physics | 15 | Active |
| US5495587A | Method for processing checkpoint instructions to allow concurrent execution of overlapping instructions | Physics | 15 | Expired |
| US5694587A | Specialized millicode instructions for test PSW validity, load with access test, and character translation assist | Physics | 14 | Expired |
| US6671793B1 | Method and system for managing the result from a translator co-processor in a pipelined processor | Physics | 14 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.