One step in situ doped amorphous silicon layers used for selective hemispherical grain silicon formation for crown shaped capacitor applications

US6037219A · kind A · utility

Assignee

• VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION · TW

Inventors

• Dahcheng Lin
• Jung-Ho Chang · Taipei, TW
• Hsi-Chuan Chen · Hsinchu, TW
• Kuo-Shu Tseng · New Taipei, TW

Key dates

• Filing date: Jun 25, 1998
• Grant date: Mar 14, 2000
• Expiry date: Jun 25, 2018

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/964

Abstract

A process for creating a crown shaped storage node electrode, covered with an HSG silicon layer, used to increase the surface area, and thus the capacitance of, high density, DRAM designs, has been developed. The process features creating a crown shaped storage node shape, from a composite amorphous silicon layer, wherein the composite amorphous silicon layer is comprised of a heavily doped amorphous silicon layer, used to alleviate capacitance depletion phenomena, sandwiched between undoped, or lightly doped, amorphous silicon layers, used to selectively accept the overlying HSG silicon layer. The process also features the use an HF vapor pre-clean procedure, followed by an in situ, selective deposition of HSG silicon seeds, in a conventional LPCVD chamber, prior to anneal cycle used to form the HSG silicon layer.