MOS semiconductor device
US6037627A · kind A · utility
66Cited by
5References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 4, 1997 |
| Grant date | Mar 14, 2000 |
| Priority date | — |
| Expiry date | Aug 4, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/68
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A MOS semiconductor device comprises a semiconductor substrate having source and drain regions, a first insulating film disposed over the substrate in a space overlapping opposed edges of the source and drain regions, and a gate electrode disposed on the first insulating film. A second insulating film is disposed at overlapping portions between the gate electrode and the source and drain regions to prevent the formation of a space therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.