Ohmic electrode structure for In.sub.x Ga.sub.1-x As layer

US6037663A · kind A · utility

Assignee

• SHARP KABUSHIKI KAISHA · JP

Inventors

• Motoji Yagura · Nara, JP
• Masanori Kominami · Yamatokōriyama, JP
• Toshiaki Kinosada · Izumi, JP
• Koken Yoshikawa · Ikoma, JP
• John Twynam · Regensburg, DE

Key dates

• Filing date: Sep 15, 1993
• Grant date: Mar 14, 2000
• Expiry date: Sep 15, 2013

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/62

Abstract

An ohmic electrode structure is produced by developing an In.sub.x Ga.sub.1-x As layer epitaxially on a compound semiconductor (n-Ga As), and providing a barrier layer composed of a tungsten nitride (high melting point metallic nitride) by sputtering. Then, electrode patterning is performed on the top of the tungsten nitride barrier layer by the photo-resist technique. After the process, unnecessary portion of the tungsten nitride barrier layer is removed by the reactive ion etching (RIE). On the top of this a Ti layer, a Pt layer and an Au layer are deposited in layers in that order by the lift-off technique to form a metal layer. Here, molybdenum nitride or titanium nitride may be used in place of tungsten nitride.