Multiple device test layout
US6037795A · kind A · utility
14Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 1997 |
| Grant date | Mar 14, 2000 |
| Priority date | — |
| Expiry date | Sep 26, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A test layout increases the sample size of electromigration experiments. Through pad sharing, the number of structures tested can be increased, allowing hundreds of identical structures to be tested in a single high temperature oven door.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.