Inventor · Wappingers Falls, NY, US

Ronald G. Filippi

114Patents
16h-index
104Co-inventors
89Inventor score

Filing activity: Apr 30, 1997 → Jan 4, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US7397260B2 Structure and method for monitoring stress-induced degradation of conductive interconnects Electricity 167 Expired
US6383920B1 Process of enclosing via for improved reliability in dual damascene interconnects Electricity 102 Expired
US6417572B1 Process for producing metal interconnections and product produced thereby Electricity 53 Expired
US6202191A Electromigration resistant power distribution network Electricity 48 Expired
US8304863B2 Electromigration immune through-substrate vias Electricity 29 Active
US6603321B2 Method and apparatus for accelerated determination of electromigration characteristics of semiconductor wiring Electricity 24 Expired
US9502350B1 Interconnect scaling method including forming dielectric layer over subtractively etched first conductive layer and forming second conductive material on dielectric layer Electricity 22 Active
US9601426B1 Interconnect structure having subtractive etch feature and damascene feature Electricity 21 Active
US7560375B2 Gas dielectric structure forming methods Electricity 21 Expired
US10177031B2 Subtractive etch interconnects Electricity 19 Active
US8056039B2 Interconnect structure for integrated circuits having improved electromigration characteristics Electricity 18 Active
US8299567B2 Structure of metal e-fuse Electricity 17 Active
US8232646B2 Interconnect structure for integrated circuits having enhanced electromigration resistance Electricity 17 Active
US9171801B2 E-fuse with hybrid metallization Electricity 17 Active
US5943601A Process for fabricating a metallization structure Electricity 16 Expired
US6518670B1 Electrically porous on-chip decoupling/shielding layer Electricity 16 Expired
US6037795A Multiple device test layout Electricity 14 Expired
US9536830B2 High performance refractory metal / copper interconnects to eliminate electromigration Electricity 13 Active
US8633707B2 Stacked via structure for metal fuse applications Electricity 12 Active
US9685404B2 Back-end electrically programmable fuse Electricity 11 Active
US9059170B2 Electronic fuse having a damaged region Electricity 11 Active
US7737528B2 Structure and method of forming electrically blown metal fuses for integrated circuits Electricity 10 Active
US6448173B1 Aluminum-based metallization exhibiting reduced electromigration and method therefor Electricity 9 Expired
US8420537B2 Stress locking layer for reliable metallization Electricity 9 Active
US7260810B2 Method of extracting properties of back end of line (BEOL) chip architecture Physics 8 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.