Method of fabricating semiconductor device having stacked-layered substrate
US6040200A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Apr 14, 1997 |
| Grant date | Mar 21, 2000 |
| Priority date | — |
| Expiry date | Apr 14, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of fabricating a light valve device comprises forming a substrate having stacked layers including a light-shielding thin film layer, an insulating film, and a single crystalline semiconductor thin film stacked in this order on a transparent support substrate. A light-shielding layer pattern is formed by selectively etching the stacked layers. Thereafter, a switching element is formed comprised of a transistor having a channel region formed in the single crystalline semiconductor thin film and a main gate electrode covering the channel region. The channel region is provided over the light-shielding pattern layer to prevent light incident from the transparent support substrate from illuminating the channel region to suppress a photo-induced leakage current in the channel region. A transparent electrode is formed and is electrically connected to the switching element. An opposing substrate is then provided over the substrate at the side of the single crystalline semiconductor thin film, and an electro-optical material layer is interposed between the substrate and the opposing substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.