Chip on tape die reframe process
US6043100A · kind A · utility
5Cited by
11References
46Claims
0Family size
Inventors
Key dates
| Filing date | Apr 19, 1996 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | Apr 19, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A die is unpackaged from a Chip on Tape by grinding off molding compound from an upper surface of the COT until the COT's leads are evenly exposed across the upper surface, selectively etching out the leads using the remaining molding compound as a mask, removing an underlying layer of gold plating, and then removing the remaining molding compound. The unpacked die can then be reframed with new leads and molding compound for failure analysis and electrical failure verification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.