Kevin Weaver
20Patents
5h-index
22Co-inventors
65Inventor score
Filing activity: Apr 19, 1996 → Jun 12, 2006
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6100590A | Low capacitance multilevel metal interconnect structure and method of manufacture | Electricity | 23 | Expired |
| US6068727A | Apparatus and method for separating a stiffener member from a flip chip integrated circuit package substrate | Emerging Cross-Sectional Technologies | 22 | Expired |
| US6117352A | Removal of a heat spreader from an integrated circuit package to permit testing of the integrated circuit and other elements of the package | Electricity | 15 | Expired |
| US7087927B1 | Semiconductor die with an editing structure | Electricity | 15 | Expired |
| US7279343B1 | De-packaging process for small outline transistor packages | Electricity | 10 | Expired |
| US6043100A | Chip on tape die reframe process | Electricity | 5 | Expired |
| US6083848A | Removing solder from integrated circuits for failure analysis | Physics | 5 | Expired |
| US6518074B1 | Backside IC device preparation process | Physics | 4 | Expired |
| US6842021B1 | System and method for detecting location of a defective electrical connection within an integrated circuit | Physics | 4 | Expired |
| US7250310B1 | Process for forming and analyzing stacked die | Physics | 3 | Expired |
| US6937351B1 | Non-destructive method of measuring the thickness of a semiconductor wafer | Physics | 2 | Expired |
| US6411111B1 | Electron-electro-optical debug system E2ODS | Physics | 2 | Expired |
| US5990543A | Reframed chip-on-tape die | Electricity | 2 | Expired |
| US6952106B1 | E-beam voltage potential circuit performance library | Physics | 1 | Expired |
| US7172977B1 | Method for non-destructive removal of cured epoxy from wafer backside | Electricity | 1 | Expired |
| US6801046B1 | Method of testing the electrostatic discharge performance of an IC device | Physics | 1 | Expired |
| US7352001B1 | Method of editing a semiconductor die | Electricity | 0 | Active |
| US7848562B1 | Method of reducing the time required to perform a passive voltage contrast test | Physics | 0 | Active |
| US7470553B1 | Built-in design edit structures | Electricity | 0 | Expired |
| US6424167B1 | Vibration resistant test module for use with semiconductor device test apparatus | Physics | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.