III-V heterojunction bipolar transistor having a GaAs emitter ballast
US6043520A · kind A · utility
30Cited by
8References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 18, 1998 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | Sep 18, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/125
Abstract
A hetero-junction bipolar transistor having high reliability wherein a ballast resistance is exactly controlled and deterioration in current stability is eliminated. A GaAs ballast resistor layer is provided in a hetero-junction bipolar transistor having a GaAs emitter layer, an InGaP spacer layer, and a GaAs base layer, preventing a notch from being formed in the conduction band at the interface of the emitter layer and the ballast resistor layer, exactly controlling the ballast resistance. The AlGaAs layer is prevented from trapping impurities and the current stability is prevented from deteriorating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.