Semiconductor device
US6043536A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 1999 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | May 18, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
In a semiconductor device including a full depletion MISFET transistor made by using a SOI layer and intended to stabilize a predetermined threshold value while holding the threshold value sensitivity to fluctuation in thickness of the SOI layer even upon changes in impurity concentration of a channel region of the MISFET transistor by changing a back gate voltage in accordance with the impurity concentration of the channel region, thickness of the SOI layer is determined to reduce changes in threshold value, and impurity concentration of the channel region is measured by using a detector element to adjust the back gate voltage in response to the measured value. Thus, the desired threshold voltage can be maintained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.