Two-stage power noise filter with on and off chip capacitors
US6043724A · kind A · utility
17Cited by
9References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 1998 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | Jan 29, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15312
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Described is a novel implementation of a medium and high frequency on-module (off-chip)/on-chip power noise filter for power noise sensitive circuits. To achieve this, a second order low-pass approach is used. The first stage capacitor is located on-module (off-chip), and the second stage capacitor is implemented on-chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.