System for adjusting slew rate on an output of a drive circuit by enabling a plurality of pre-drivers and a plurality of output drivers
US6047346A · kind A · utility
195Cited by
30References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 2, 1998 |
| Grant date | Apr 4, 2000 |
| Priority date | — |
| Expiry date | Feb 2, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface circuit providing a high speed bus. According to one embodiment, the interface circuitry includes a plurality of I/O pins coupled to a plurality of bus drivers, wherein each bus driver is configured to adjust the rise time, fall time, and drive strength of outputs signal on the I/O pins based on process-voltage-temperature ("PVT") conditions. The circuitry used to adjust the I/O outputs includes a slew rate control circuit, a current control circuit, and a delay lock loop ("DLL").
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.