Method of fabricating embedded dynamic random access memory
US6048762A · kind A · utility
11Cited by
7References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 6, 1998 |
| Grant date | Apr 11, 2000 |
| Priority date | — |
| Expiry date | Apr 6, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/31
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating an embedded dynamic random access memory. Using the method of dual damascence, by forming patterning only one dielectric layer, the contact windows with different depth are formed. In addition, the metal layer formed within the metal connecting regions are used as interconnects without further process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.