Borderless contacts for dual-damascene interconnect process
US6048787A · kind A · utility
8Cited by
15References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 8, 1998 |
| Grant date | Apr 11, 2000 |
| Priority date | — |
| Expiry date | Sep 8, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
For multiple layer interconnections using copper, the top interconnection layer and the via hole to the bottom layer are self-aligned on at least one side. The self-alignment eliminates the need for providing a border for the contact of the via hole to the interconnection. The self-alignment is accomplished by using a nitride mask, which defines one side of both the via hole and the interconnection. After the top surface of the copper interconnection is planarized, another layer of copper interconnection can be superimposed over the first interconnection in a similar manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.